In addition to 12-bit resolution and 24 shared analog input channels, each ADC module supports both single-ended and differential modes of operation. Each ADC module is capable of sampling at 1 Msps. To achieve higher sampling rates, two ADC modules can be configured to capture analog signals simultaneously, for interleaved operation. This is a new, ground-up design that features selectable reference signals for ADC, i.e., the ADC reference voltages can be provided internally from within the chip, or externally from a regulated power supply. The ADC modules also have a hardware averaging circuit that can be used to average up to 64 samples for applications that involve higher accuracy. Each ADC module can be triggered from the software, the processor, or from other peripherals like timers, comparators, PWM and GPIOs. There are eight digital comparators per ADC module. DMA may be used to increase efficiency by allowing each sample sequencer to operate independently and transfer data without processor intervention or reconfiguration. The ADC module also features optional phase shift in sample time, a feature that will be discussed in more detail later.